• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A method for fabricating a repair fuse box of a semiconductor device is disclosed. An etching stop polysilicon layer formed at a belt shape in edge portions of a repair fuse box is broken during a repair etching process without substantial departure from prior art methods for fabricating a repair fuse box of a semiconductor device. Thus, it is possible to improve repair yield of the semiconductor device.
    公开号:US20010007794A1
    申请号:US09/751,847
    申请日:2001-01-02
    公开日:2001-07-12
    发明作者:Eul Rak Kim；Joong Shik Shin
    申请人:Hyundai Electronics Industries Co Ltd；
    IPC主号:H01L23-5258
    专利说明:
    [0001] 1. Field of the Invention [0001]
    [0002] The present invention relates to a method for fabricating a repair fuse box for a semiconductor device and, more particularly, to a method for fabricating a repair fuse box for a semiconductor device in which the layout of an etching stop polysilicon layer within the semiconductor repair fuse box may be varied without requiring an additional process step and thereby improve the repair yield of the semiconductor device. [0002]
    [0003] 2. Background of the Related Art [0003]
    [0004] When a defective portion of a semiconductor device has been in fabricating a semiconductor device, the defective portion is generally repaired. Particularly during the fabrication of a semiconductor DRAM device, the defective portions are replaced using a redundancy cell to repair the device and improve the yield. [0004]
    [0005] A prior art repair method will be described with reference to FIGS. 1 and 2 which show prior art repair fuse boxes. [0005]
    [0006] Referring to FIG. 1, a related art repair fuse box [0006] 10 is defined in a rectangular shape. Polysilicon fuses 12 (Poly2) are arranged within the repair fuse box 10, and an etching stop polysilicon layer 14 (Poly4) is formed in a rectangular belt shape surrounding the repair fuse box 10.
    [0007] Referring to FIG. 2, a first insulating film [0007] 20 and the fuses 12 are formed on a semiconductor substrate (not shown). A second insulating film 22, the etching stop polysilicon layer 14 and a third insulating film 24 are formed on upper portions of the first insulating film 20 and the fuses 12. The third insulating film 24 is formed outside the repair fuse box 10, and the etching stop polysilicon layer 14 is formed on insulating film 22 around the edge portions of the repair fuse box 10.
    [0008] When the prior art Poly2 or Poly1 levels are used to form the fuses [0008] 12, the fuses 12 are susceptible to a thickness of an oxide film that remains over the fuses 12. Thus, the fuses 12 may be broken. Accordingly, the etching stop polysilicon layer 14 is formed on a portion which will be used as the repair fuse box 10, so that the thickness of the oxide film remaining over the fuses 12 can be controlled uniformly during the subsequent process that will open the repair fuse box.
    [0009] In order to repair a semiconductor device using a redundancy cell, certain the fuses [0009] 12 within repair fuse box 10 are then cut by lasers to disconnect a predetermined portion of the device circuitry.
    [0010] As shown in FIGS. 3 and 4, however, a polysilicon residue [0010] 16 is fused and sticks to a sidewall of the fuse box 10 when cutting the fuses 12. In other words, if the fuses 12 are of W salicide layer, the polysilicon residue 16 of WSix can remain within the fuse box. The remaining portion of the cut fuses 12 can become connected to the etching stop polysilicon layer 14 by this polysilicon residue 16, thereby causing poor repair performance. SUMMARY OF THE INVENTION
    [0011] Accordingly, the present invention is directed to a method for fabricating a repair fuse box for a semiconductor device that substantially overcomes one or more of the limitations and disadvantages of the prior art. [0011]
    [0012] An object of the present invention is to provide a method for fabricating a repair fuse box for a semiconductor device in which the layout of an etching stop polysilicon layer within a semiconductor repair fuse box is varied, without requiring additional process step, to improve the repair yield of the semiconductor device. [0012]
    [0013] Additional advantages, objects, and features of the invention will be set forth in part in the following description and may become apparent to those having ordinary skill in the art upon review of the description or may be learned from practicing the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims. [0013]
    [0014] To achieve these and other advantages in addition to the purpose of the present invention provides a method for fabricating a repair fuse box for a semiconductor device that includes the steps of forming a first insulating film on a semiconductor substrate having a predetermined lower structure; forming fuses on the first insulating film, forming a second insulating film on an entire surface of the above structure; forming an etching stop polysilicon layer on a portion of the second insulating film that is sized to be larger than the repair fuse box and overlap the edge portions of the repair fuse box; forming a third insulating film on the entire surface of the above structure; forming a photoresist pattern on the third insulating film to expose a portion, which will be used as a repair fuse box, so that at least two portions where the edge portions of the repair fuse box overlap the etching stop polysilicon layer are exposed; removing the third insulating film using the photoresist pattern as a mask to expose the etching stop polysilicon layer; etching the exposed etching stop polysilicon layer to form an etching stop polysilicon layer pattern having two or more broken portions in a belt shape at the edge portions of the repair fuse box; and, etching portion of the second insulating film exposed by the photoresist pattern to remove a predetermined thickness. [0014]
    [0015] In the preferred embodiment of the present invention, the fuses are formed of Poly1 or Poly2 levels, and the etching stop polysilicon layer is formed of polysilicon from the Poly4 level. [0015]
    [0016] It is to be understood that both the foregoing general description, the following detailed description and the figures intended to provide further explanation of the invention as claimed and not as limiting the invention to the particular embodiments illustrated and described. [0016] BRIEF DESCRIPTION OF THE DRAWINGS
    [0017] The invention will be described in detail with reference to the following figures in which corresponding reference numerals are intended to refer to corresponding elements wherein: [0017]
    [0018] FIG. 1 is a layout of a related art repair fuse box; [0018]
    [0019] FIG. 2 is a sectional view taken along line I′-I″ of FIG. 1; [0019]
    [0020] FIG. 3 is a layout of a repair fuse box in case that a repair is failed; [0020]
    [0021] FIG. 4 is a sectional view taken along line II′-II″ of FIG. 3; [0021]
    [0022] FIG. 5 is a layout of a repair fuse box according to one embodiment of the present invention; and [0022]
    [0023] FIG. 6 is a layout of a repair fuse box according to another embodiment of the present invention. [0023] DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
    [0024] Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying figures. [0024]
    [0025] FIG. 5 illustrates a layout of a repair fuse box according to one embodiment of the present invention. [0025]
    [0026] Polysilicon fuses [0026] 12 are preferably formed from a Poly2 layer in conjunction with the formation of a bitline or charge storing electrode. The fuses 12 are formed in a repair fuse box 10 that has a generally rectangular shape. At the edge portions of the repair fuse box 10, an etching stop polysilicon layer 14 formed in conjunction with the formation of the bitline or charge storing electrode. The etching stop polysilicon layer 14 is formed in a belt shape having at least two broken portions.
    [0027] A method for fabricating the repair fuse box [0027] 10 according to the present invention will be described with reference to FIG. 2.
    [0028] First, a first insulating film [0028] 20 is formed on a semiconductor substrate (not shown), and fuses 12 are formed on the first insulating film 20 during the process of forming Poly2 or Poly1 patterns. Then, a second insulating film 22, the etching stop polysilicon layer 14 and a third insulating film 24 are sequentially formed on the upper portion of an entire surface. The etching stop polysilicon layer 14 is formed to be larger than the intended repair fuse box 10 which will be formed later, so that the edge portions of the repair fuse box 10 are overlapped by the etching stop polysilicon layer 14.
    [0029] A photoresist pattern (not shown) is then formed to expose a portion which will be used as the repair fuse box. The third insulating film [0029] 24 is then removed using the photoresist pattern as a mask. A portion of the etching stop polysilicon layer 4 is then removed, leaving portions on edges of the repair fuse box 10 in a belt shape. Thus, the repair fuse box 10 has a “C” or “
    [0030] As shown in FIG. 5, portions A and B of the etching stop polysilicon layer [0030] 14 are formed from the same polysilicon layers. However, although the portions A and B are in contact with each other before the repair fuse box etching process, the portions A and B are defined and separated from each other during the repair fuse box etching process.
    [0031] As described above, if the etching stop polysilicon layer [0031] 14 is broken during the repair fuse box etching process that forms the repair fuse box 10, shorts between the fuse 12 and a portion of the etching step polysilicon wafer resulting from polysilicon residue remaining from the laser repair process do not defeat the repair process.
    [0032] FIG. 6 is a layout of a repair fuse box according to other embodiment of the present invention. Referring to FIG. 6, the etching stop polysilicon layer [0032] 14 having a belt shape is broken at both sides. In other words, portions C and D of the etching stop polysilicon layer 14 are twice broken by the repair fuse box etching process.
    [0033] As discusses above, the method for fabricating a repair fuse box of a semiconductor device according to the present invention has the following advantages. [0033]
    [0034] It is possible to improve repair yield for defective portions of a semiconductor device by varying the layout of the etching stop layer without having to vary the basic prior art method for fabricating a repair fuse box for a semiconductor device. [0034]
    [0035] The foregoing embodiments and advantages are merely exemplary and are not to be construed as limiting the present invention. The present teaching can be readily applied to other types of apparatuses. The description of the present invention is intended to be illustrative, and not to limit the scope of the claims. Many alternatives, modifications and variations will be apparent to those skilled in the art. In the claims, means-plus-function clauses are intended to cover the structures described herein as performing the recited function and not only structural equivalents but also equivalent structures. [0035]
    权利要求:
    Claims (2)
    [1" id="US-20010007794-A1-CLM-00001] 1. A method for fabricating a repair fuse box for a semiconductor device comprising the steps of:
    forming a first insulating film on a semiconductor substrate having a predetermined lower structure;
    forming fuses on the first insulating film;
    forming a second insulating film on the fuses and the first insulating film;
    forming an etching stop polysilicon pattern layer on a portion of the second insulating film, the portion is being that which will be used to form the repair fuse box, the etching stop polysilicon pattern being larger than the intended fuse box and positioned so as to overlap edge portions of the repair fuse box;
    forming a third insulating film on the entire surface of the above structure;
    forming a photoresist pattern on the third insulating film to expose a portion which will be used to form the repair fuse box, the photoresist pattern also exposing at least two overlapping portions of the etching stop polysilicon layer at the edge portions of the repair fuse box;
    removing the third insulating film using the photoresist pattern as a mask to expose the etching stop polysilicon layer;
    etching the exposed etching stop polysilicon layer to form an etching stop polysilicon layer pattern having two or more broken portions surrounding the edge portions of the repair fuse box; and
    etching a portion of the second insulating film exposed by the photoresist pattern to reduce the thickness of the second insulating film above the fuses.
    [2" id="US-20010007794-A1-CLM-00002] 2. The method of
    claim 1 , wherein the fuses are formed from a Poly1 layer or a Poly2 layer, and the etching stop polysilicon layer is formed from a Poly4 layer.
    类似技术:
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    同族专利:
    公开号 | 公开日
    US6458709B2|2002-10-01|
    KR20010060043A|2001-07-06|
    KR100357302B1|2002-10-19|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US20060024853A1|2004-07-29|2006-02-02|International Busines Machines Corporation|Structure for monitoring semiconductor polysilicon gate profile|
    US9892221B2|2009-02-20|2018-02-13|Taiwan Semiconductor Manufacturing Company, Ltd.|Method and system of generating a layout including a fuse layout pattern|JPS6038836A|1983-08-12|1985-02-28|Hitachi Ltd|Semiconductor device|
    JPH0951038A|1995-08-07|1997-02-18|Matsushita Electron Corp|Semiconductor device and its production|
    KR19980054504A|1996-12-27|1998-09-25|김영환|Repair fuse for semiconductor device and manufacturing method thereof|
    US5976978A|1997-12-22|1999-11-02|General Electric Company|Process for repairing data transmission lines of imagers|
    KR20000010116A|1998-07-30|2000-02-15|김영환|Method for forming a repair fuse box of a semiconductor device|
    US6017824A|1998-11-16|2000-01-25|Taiwan Semiconductor Manufacturing Company|Passivation etching procedure, using a polysilicon stop layer, for repairing embedded DRAM cells|US20040131559A1|2002-11-04|2004-07-08|Hauck Douglas J.|Oral disease prevention and treatment|
    法律状态:
    2001-03-08| AS| Assignment|Owner name: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD., KOREA, R Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KIM, EUL RAK;REEL/FRAME:011572/0087 Effective date: 20001201 |
    2001-04-24| AS| Assignment|Owner name: HYUNDAI ELECTRONICS INDUSTRIES CO. LTD., KOREA, RE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KIM, EUL RAK;SHIN, JOONG SHIK;REEL/FRAME:011740/0044 Effective date: 20010315 |
    2006-03-13| FPAY| Fee payment|Year of fee payment: 4 |
    2010-03-30| FPAY| Fee payment|Year of fee payment: 8 |
    2014-05-09| REMI| Maintenance fee reminder mailed|
    2014-10-01| LAPS| Lapse for failure to pay maintenance fees|
    2014-10-27| STCH| Information on status: patent discontinuation|Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
    2014-11-18| FP| Lapsed due to failure to pay maintenance fee|Effective date: 20141001 |
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019990068041A|KR100357302B1|1999-12-31|1999-12-31|Manufacturing method for semiconductor device|
    KR1999-68041||1999-12-31||
    KR99-68041||1999-12-31||
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